cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 71

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cx28250

Manufacturer Part Number
cx28250
Description
Cx28250 Atm Physical Interface Phy Devices
Manufacturer
Mindspeed Technologies
Datasheet

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CX28250
ATM Physical Interface (PHY) Devices
2.5.1 UTOPIA Transmit and Receive FIFOs
28250-DSH-002-C
2.5 UTOPIA Interface
The CX28250 uses the ATM Forum’s UTOPIA interface as its host interface to
communicate with the ATM layer device. This interface is UTOPIA Level 2
compliant and UTOPIA Level 1 compatible. In brief, these two specifications are
described as follows:
interface with cell handshaking unless the higher data rates are required. This
reduces board size, layout complexity, and EMI with no performance impact at
155.52 Mbps.
default value of this bit is controlled by the UtopMode pin (for the CX28250-26
only). Refer to
The CX28250 UTOPIA block has two sections, transmit and receive, each of
which has a 4-cell FIFO buffer. ATM cell data is placed in the transmit FIFOs
where it can then be passed to the SONET framing block. On the receive side of
the UTOPIA interface, incoming cells are stripped of SONET overhead,
converted to ATM formatted cells, and placed in the receive FIFO until sent out.
NOTE:
• UTOPIA Level 1: This is an 8- or 16-bit interface designed for data rates
• UTOPIA Level 2: This interface provides all the features of Level 1 plus
When using a single PHY, Mindspeed recommends using the 8-bit, Level 1
The UTOPIA mode is selected by bit 5 of the UTOP1 register. The power-on
up to 200 Mbps. Both octet-level and cell-level handshaking are supported
at a clock rate of 25 MHz. Octet-level handshaking requires the PHY to
guarantee the acceptance of at least 4 bytes before it asserts the TxFull
control line. In Cell level, it must guarantee the transfer of at least one
entire 53-byte cell.
several enhancements. Level 2 defines multi-PHY functionality, allowing
up to 31 PHYs to interface to one ATM layer device.This interface uses
either 8-bit or 16-bit wide data buses and cell-level handshaking. The
16-bit mode, which can run at 50 MHz, supports data rates up to 800
Mbps.
By convention, data being transferred from the PHY to the ATM layer is
labelled received data and data from the ATM layer to the PHY is called
transmitted data.
Mindspeed Technologies
Table 1-1
for a description of this pin.
2.0 Functional Description
2.5 UTOPIA Interface
2-35

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