DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 104

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

4.2
4.2.1
A reset has the highest exception priority.
When the RES pin goes low, all processing halts and the H8S/2357 Group enters the reset state. A reset initializes the
internal state of the CPU and the registers of on-chip supporting modules. Immediately after a reset, interrupt control
mode 0 is set.
Reset exception handling begins when the RES pin changes from low to high.
In the F-ZTAT, masked ROM, and ROMless versions, a reset is always a power-on reset, regardless of the NMI pin level
at the time. Also, a reset caused by the watchdog timer is always a power-on reset, regardless of the setting of the RSTS
bit in the RSTCR register.
In the ZTAT version, a reset may be either a power-on reset or a manual reset*, according to the NMI pin level at the time.
A reset caused by the watchdog timer, also, may be either a power-on reset or a manual reset*.
For details see section 13, Watchdog Timer.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
4.2.2
A reset can be of either of two types: a power-on reset or a manual reset*. Reset types are shown in table 4-3. A power-on
reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes all the registers in the
on-chip supporting modules, while a manual reset* initializes all the registers in the on-chip supporting modules except
for the bus controller and I/O ports, which retain their previous states.
With a manual reset*, since the on-chip supporting modules are initialized, ports used as on-chip supporting module I/O
pins are switched to I/O ports controlled by DDR and DR.
Table 4-3
A reset caused by the watchdog timer can also be of either of two types: a power-on reset or a manual reset*.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Rev.6.00 Oct.28.2004 page 74 of 1016
REJ09B0138-0600H
Reset
Overview
Reset Types
Type
Power-on reset High
Manual reset*
Reset Types
NMI
Low
Reset Transition
Conditions
RES
Low
Low
CPU
Initialized Initialized
Initialized Initialized, except for bus controller and I/O ports
On-Chip Supporting Modules
Internal State