DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 388

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

Rev.6.00 Oct.28.2004 page 358 of 1016
REJ09B0138-0600H
Channel
1
Channel
2
Bit 3
IOA3
0
1
Bit 3
IOA3
0
1
Bit 2
IOA2
0
1
0
1
Bit 2
IOA2
0
1
Bit 1
IOA1
0
1
0
1
0
1
Bit 1
IOA1
0
1
0
1
0
1
Bit 0
IOA0 Description
0
1
0
1
0
1
0
1
0
1
Bit 0
IOA0 Description
0
1
0
1
0
1
0
1
0
1
TGR1A is Output disabled
output
compare
register
TGR1A is
input
capture
register
TGR2A is Output disabled
output
compare
register
TGR2A is
input
capture
register
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCA1 pin
Capture input
source is TGR0A
compare match/
input capture
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCA2 pin
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of
channel 0/TGR0A compare
match/input capture
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
(Initial value)
(Initial value)
: Don’t care
: Don’t care