DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 343

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

9.10.2
Table 9-17 shows the port C register configuration.
Table 9-17 Port C Registers
Note: * Lower 16 bits of the address.
Port C Data Direction Register (PCDDR) (On-Chip ROM Version Only)
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port C. PCDDR
cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode. The OPE bit in SBYCR is used to select whether the address output pins retain their
output state or become high-impedance when a transition is made to software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port C Data Register (PCDR) (On-Chip ROM Version Only)
PCDR is an 8-bit readable/writable register that stores output data for the port C pins (PC
PCDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing the bit to 0 makes the pin
an input port.
Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while clearing the bit to 0 makes the
pin an input port.
Modes 4 and 5
The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.
Register Configuration (On-Chip ROM Version Only)
Name
Port C data direction register
Port C data register
Port C register
Port C MOS pull-up control register
:
:
:
:
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
PC7DR
R/W
W
7
0
7
0
PC6DR
R/W
W
6
0
6
0
PC5DR
R/W
W
5
0
5
0
PC4DR
R/W
W
Abbreviation
PCDDR
PCDR
PORTC
PCPCR
4
0
4
0
PC3DR
R/W
W
3
0
3
0
PC2DR
R/W
W
R/W
R
R/W
R/W
W
2
0
2
0
Initial Value
H'00
H'00
Undefined
H'00
PC1DR
R/W
W
Rev.6.00 Oct.28.2004 page 313 of 1016
1
0
1
0
7
PC0DR
to PC
R/W
W
0
0
0
0
0
).
Address *
H'FEBB
H'FF6B
H'FF5B
H'FF72
REJ09B0138-0600H