DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 226

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

7.5.2
Sequential mode can be specified by clearing the RPE bit in DMACR to 0. In sequential mode, MAR is updated after each
byte or word transfer in response to a single transfer request, and this is executed the number of times specified in ETCR.
One address is specified by MAR, and the other by IOAR. The transfer direction can be specified by the DTDIR bit in
DMACR.
Table 7-6 summarizes register functions in sequential mode.
Table 7-6
Legend:
MAR: Memory address register
IOAR: I/O address register
ETCR: Transfer count register
DTDIR:Data transfer direction bit
MAR specifies the start address of the transfer source or transfer destination as 24 bits. MAR is incremented or
decremented by 1 or 2 each time a byte or word is transferred.
IOAR specifies the lower 16 bits of the other address. The 8 bits above IOAR have a value of H'FF.
Rev.6.00 Oct.28.2004 page 196 of 1016
REJ09B0138-0600H
Sequential Mode
Register
23
23
Register Functions in Sequential Mode
H'FF
15
15
MAR
ETCR
IOAR
0
0
0
DTDIR = 0 DTDIR = 1 Initial Setting
Source
address
register
Destination
address
register
Transfer counter
Function
Destination
address
register
Source
address
register
Start address of
transfer destination
or transfer source
Start address of
transfer source or
transfer destination
Number of transfers Decremented every
Operation
Incremented/
decremented every
transfer
Fixed
transfer; transfer
ends when count
reaches H'0000