DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 130

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

5.5.3
There are times when interrupt acceptance is disabled by the interrupt controller.
The interrupt controller disables interrupt acceptance for a 3-state period after the CPU has updated the mask level with an
LDC, ANDC, ORC, or XORC instruction.
5.5.4
Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.
With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer is not accepted until the
move is completed.
With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt exception handling starts at
a break in the transfer cycle. The PC value saved on the stack in this case is the address of the next instruction.
Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the following coding should be
used.
5.6
5.6.1
The DTC and DMAC can be activated by an interrupt. In this case, the following options are available:
For details of interrupt requests that can be used with to activate the DTC or DMAC, see section 8, Data Transfer
Controller, and section 7, DMA Controller.
Rev.6.00 Oct.28.2004 page 100 of 1016
REJ09B0138-0600H
Interrupt request to CPU
Activation request to DTC
Activation request to DMAC
Selection of a number of the above
L1:
Times when Interrupts are Disabled
Interrupts during Execution of EEPMOV Instruction
DTC and DMAC Activation by Interrupt
Overview
EEPMOV.W
MOV.W
BNE
R4,R4
L1