DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 426

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

Input Capture/Compare Match Interrupt: An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF
flag in TSR is set to 1 by the occurrence of a TGR input capture/compare match on a particular channel. The interrupt
request is cleared by clearing the TGF flag to 0. The TPU has 16 input capture/compare match interrupts, four each for
channels 0 and 3, and two each for channels 1, 2, 4, and 5.
Overflow Interrupt: An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to 1
by the occurrence of TCNT overflow on a channel. The interrupt request is cleared by clearing the TCFV flag to 0. The
TPU has six overflow interrupts, one for each channel.
Underflow Interrupt: An interrupt is requested if the TCIEU bit in TIER is set to 1 when the TCFU flag in TSR is set to
1 by the occurrence of TCNT underflow on a channel. The interrupt request is cleared by clearing the TCFU flag to 0.
The TPU has four underflow interrupts, one each for channels 1, 2, 4, and 5.
10.5.2
DTC Activation: The DTC can be activated by the TGR input capture/compare match interrupt for a channel. For details,
see section 8, Data Transfer Controller.
A total of 16 TPU input capture/compare match interrupts can be used as DTC activation sources, four each for channels 0
and 3, and two each for channels 1, 2, 4, and 5.
DMAC Activation: The DMAC can be activated by the TGRA input capture/compare match interrupt for a channel. For
details, see section 7, DMA Controller.
In the TPU, a total of six TGRA input capture/compare match interrupts can be used as DMAC activation sources, one for
each channel.
10.5.3
The A/D converter can be activated by the TGRA input capture/compare match for a channel.
If the TTGE bit in TIER is set to 1 when the TGFA flag in TSR is set to 1 by the occurrence of a TGRA input
capture/compare match on a particular channel, a request to start A/D conversion is sent to the A/D converter. If the TPU
conversion start trigger has been selected on the A/D converter side at this time, A/D conversion is started.
In the TPU, a total of six TGRA input capture/compare match interrupts can be used as A/D converter conversion start
sources, one for each channel.
Rev.6.00 Oct.28.2004 page 396 of 1016
REJ09B0138-0600H
DTC/DMAC Activation
A/D Converter Activation