DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 438

IC H8S MCU FLASH 256K 120TQFP

DF2398TE20

Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Contention between Buffer Register Write and Input Capture: If the input capture signal is generated in the T
a buffer write cycle, the buffer operation takes precedence and the write to the buffer register is not performed.
Figure 10-55 shows the timing in this case.
Contention between Overflow/Underflow and Counter Clearing: If overflow/underflow and counter clearing occur
simultaneously, the TCFV/TCFU flag in TSR is not set and TCNT clearing takes precedence.
Figure 10-56 shows the operation timing when a TGR compare match is specified as the clearing source, and H'FFFF is
set in TGR.
Rev.6.00 Oct.28.2004 page 408 of 1016
REJ09B0138-0600H
ø
Address
Write signal
Input capture
signal
TCNT
TGR
Buffer
register
Figure 10-55 Contention between Buffer Register Write and Input Capture
Figure 10-56 Contention between Overflow and Counter Clearing
TCNT input
clock
TCNT
Counter
clear signal
TGF
TCFV
ø
H'FFFF
Prohibited
Buffer register write cycle
M
Buffer register
T
1
address
N
T
2
H'0000
M
N
2
state of

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