DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 90
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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3.3
3.3.1
Mode 1 is not supported in this LSI, and must not be set.
3.3.2
This is a flash memory boot mode. For details, see section 19, ROM.
MCU operation is the same as in mode 6.
3.3.3
This is a flash memory boot mode. For details, see section 19, ROM.
MCU operation is the same as in mode 7.
3.3.4
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A, B and C function as an address bus, ports D and E function as a data bus, and part of port F carries bus control
signals.
The initial bus mode after a reset is 16 bits, with 16-bit access to all areas. However, note that if 8-bit access is designated
by the bus controller for all areas, the bus mode switches to 8 bits.
3.3.5
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A, B and C function as an address bus, ports D and E function as a data bus, and part of port F carries bus control
signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, note that if at least one area is
designated for 16-bit access by the bus controller, the bus mode switches to 16 bits and port E becomes a data bus.
3.3.6
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
Ports A, B and C function as input ports immediately after a reset. They can each be set to output addresses by setting the
corresponding bits in the data direction register (DDR) to 1. Port D functions as a data bus, and part of port F carries bus
control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, note that if at least one area is
designated for 16-bit access by the bus controller, the bus mode switches to 16 bits and port E becomes a data bus.
Rev.6.00 Oct.28.2004 page 60 of 1016
REJ09B0138-0600H
Operating Mode Descriptions
Mode 1
Mode 2 (H8S/2398 F-ZTAT Only)
Mode 3 (H8S/2398 F-ZTAT Only)
Mode 4 (On-Chip ROM Disabled Expansion Mode)
Mode 5 (On-Chip ROM Disabled Expansion Mode)
Mode 6 (On-Chip ROM Enabled Expansion Mode)
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