DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 116
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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5.2.4
ISCR registers are 16-bit readable/writable registers that select rising edge, falling edge, or both edge detection, or level
sensing, for the input at pins IRQ7 to IRQ0.
ISCR registers are initialized to H'0000 by a reset and in hardware standby mode.
Bits 15 to 0: IRQ7 Sense Control A and B (IRQ7SCA, IRQ7SCB) to IRQ0 Sense Control A and B (IRQ0SCA,
IRQ0SCB)
5.2.5
Note: * Only 0 can be written, to clear the flag.
ISR is an 8-bit readable/writable register that indicates the status of IRQ7 to IRQ0 interrupt requests.
ISR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 0—IRQ7 to IRQ0 flags (IRQ7F to IRQ0F): These bits indicate the status of IRQ7 to IRQ0 interrupt requests.
Rev.6.00 Oct.28.2004 page 86 of 1016
REJ09B0138-0600H
ISCRH
Bit
Initial value :
R/W
ISCRL
Bit
Initial value :
R/W
Bit
Initial value :
R/W
IRQ Sense Control Registers H and L (ISCRH, ISCRL)
IRQ Status Register (ISR)
Bits 15 to 0
IRQ7SCB to
IRQ0SCB
0
1
:
:
:
:
:
:
IRQ7SCB IRQ7SCA IRQ6SCB IRQ6SCA IRQ5SCB IRQ5SCA IRQ4SCB IRQ4SCA
IRQ3SCB IRQ3SCA IRQ2SCB IRQ2SCA IRQ1SCB IRQ1SCA IRQ0SCB IRQ0SCA
R/(W)*
IRQ7F
R/W
R/W
15
0
7
0
7
0
IRQ7SCA to
IRQ0SCA
0
1
0
1
R/(W)*
IRQ6F
R/W
R/W
14
0
6
0
6
0
R/(W)*
IRQ5F
R/W
R/W
13
0
5
0
5
0
Description
Interrupt request generated at IRQ7 to IRQ0 input low level
Interrupt request generated at falling edge of IRQ7 to IRQ0 input
Interrupt request generated at rising edge of IRQ7 to IRQ0 input
Interrupt request generated at both falling and rising edges of
IRQ7 to IRQ0 input
R/(W)*
IRQ4F
R/W
R/W
12
0
4
0
4
0
R/(W)*
IRQ3F
R/W
R/W
11
0
3
0
3
0
R/(W)*
IRQ2F
R/W
R/W
10
0
2
0
2
0
R/(W)*
IRQ1F
R/W
R/W
9
0
1
0
1
0
R/(W)*
IRQ0F
R/W
R/W
8
0
0
0
0
0
(Initial value)
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