DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 495
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.1
The H8S/2357 Group is equipped with a three-channel serial communication interface (SCI). All three channels have the
same functions. The SCI can handle both asynchronous and clocked synchronous serial communication. A function is also
provided for serial communication between processors (multiprocessor communication function).
14.1.1
SCI features are listed below.
Choice of asynchronous or clocked synchronous serial communication mode
Asynchronous mode
Clocked Synchronous mode
Full-duplex communication capability
Choice of LSB-first or MSB-first transfer
On-chip baud rate generator allows any bit rate to be selected
Choice of serial clock source
Serial data communication executed using asynchronous system in which synchronization is achieved character by
Serial data communication can be carried out with standard asynchronous communication chips such as a Universal
A multiprocessor communication function is provided that enables serial data communication with a number of
Choice of 12 serial data transfer formats
Receive error detection : Parity, overrun, and framing errors
Break detection
Serial data communication synchronized with a clock
Serial data communication can be carried out with other chips that have a synchronous communication function
One serial data transfer format
Receive error detection : Overrun errors detected
The transmitter and receiver are mutually independent, enabling transmission and reception to be executed
Double-buffering is used in both the transmitter and the receiver, enabling continuous transmission and continuous
Can be selected regardless of the communication mode* (except in the case of 7-bit data asynchronous mode)
Internal clock from baud rate generator or external clock from SCK pin
character
Asynchronous Receiver/Transmitter (UART) or Asynchronous Communication Interface Adapter (ACIA)
processors
Data length
Stop bit length
Parity
Multiprocessor bit
Data length
simultaneously
reception of serial data
Overview
Features
Section 14 Serial Communication Interface (SCI)
: 7 or 8 bits
: 1 or 2 bits
: Even, odd, or none
: 1 or 0
: Break can be detected by reading the RxD pin level
: 8 bits
directly in case of a framing error
Rev.6.00 Oct.28.2004 page 465 of 1016
REJ09B0138-0600H
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