DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 708

IC H8S MCU FLASH 256K 120TQFP

DF2398TE20

Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.7
21.7.1
When the STBY pin is driven low, a transition is made to hardware standby mode from any mode.
In hardware standby mode, all functions enter the reset state and stop operation, resulting in a significant reduction in
power dissipation. As long as the prescribed voltage is supplied, on-chip RAM data is retained. I/O ports are set to the
high-impedance state.
In order to retain on-chip RAM data, the RAME bit in SYSCR should be cleared to 0 before driving the STBY pin low.
Do not change the state of the mode pins (MD
Hardware standby mode is cleared by means of the STBY pin and the RES pin. When the STBY pin is driven high while
the RES pin is low, the reset state is set and clock oscillation is started. Ensure that the RES pin is held low until the clock
oscillator stabilizes (at least 8 ms—the oscillation stabilization time—when using a crystal oscillator). When the RES pin
is subsequently driven high, a transition is made to the program execution state via the reset exception handling state.
21.7.2
Figure 21-3 shows an example of hardware standby mode timing.
When the STBY pin is driven low after the RES pin has been driven low, a transition is made to hardware standby mode.
Hardware standby mode is cleared by driving the STBY pin high, waiting for the oscillation stabilization time, then
changing the RES pin from low to high.
Rev.6.00 Oct.28.2004 page 678 of 1016
REJ09B0138-0600H
Hardware Standby Mode
Hardware Standby Mode
Hardware Standby Mode Timing
Oscillator
RES
STBY
Figure 21-3 Hardware Standby Mode Timing (Example)
2
to MD
0
) while the H8S/2357 Group is in hardware standby mode.
Oscillation
stabilization
time
exception
handling
Reset

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