DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 456

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

Example of Normal Pulse Output (Example of Five-Phase Pulse Output): Figure 11-5 shows an example in which
pulse output is used for cyclic five-phase pulse output.
[1] Set up the TPU channel to be used as the output trigger channel so that TGRA is an output compare register and the
[2] Write H'F8 in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0 bits in PCR to select
[3] The timer counter in the TPU channel starts. When compare match A occurs, the NDRH contents are transferred to
[4] Five-phase overlapping pulse output (one or two phases active at a time) can be obtained subsequently by writing
11.3.4
Sample Setup Procedure for Non-Overlapping Pulse Output: Figure 11-6 shows a sample procedure for setting up
non-overlapping pulse output.
Rev.6.00 Oct.28.2004 page 426 of 1016
REJ09B0138-0600H
counter will be cleared by compare match A. Set the trigger period in TGRA and set the TGIEA bit in TIER to 1 to
enable the compare match A (TGIA) interrupt.
compare match in the TPU channel set up in the previous step to be the output trigger. Write output data H'80 in
NDRH.
PODRH and output. The TGIA interrupt handling routine writes the next output data (H'C0) in NDRH.
H'40, H'60, H'20, H'30. H'10, H'18, H'08, H'88... at successive TGIA interrupts. If the DTC or DMAC is set for
activation by this interrupt, pulse output can be obtained without imposing a load on the CPU.
Non-Overlapping Pulse Output
TGRA
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO11
TCNT value
PO12
Figure 11-5 Normal Pulse Output Example (Five-Phase Pulse Output)
00
80
TCNT
80
C0
C0
40
40
60
Compare match
60
20
20
30
30
10
10
18
18
08
08
88
88
80
80
C0
C0
40
Time