DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 579
![IC H8S MCU FLASH 256K 120TQFP](/photos/28/61/286120/120-tqfp_sml.jpg)
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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16.4.3
The A/D converter has a on-chip sample-and-hold circuit. The A/D converter samples the analog input at a time t
the ADST bit is set to 1, then starts conversion. Figure 16-5 shows the A/D conversion timing. Table 16-4 indicates the
A/D conversion time.
As indicated in figure 16-5, the A/D conversion time includes t
depending on the timing of the write access to ADCSR. The total conversion time therefore varies within the ranges
indicated in table 16-4.
In scan mode, the values given in table 16-4 apply to the first conversion time. In the second and subsequent conversions
the conversion time is fixed at 256 states when CKS = 0 or 128 states when CKS = 1.
Table 16-4 A/D Conversion Time (Single Mode)
Note: Values in the table are the number of states.
Input Sampling and A/D Conversion Time
Item
A/D conversion start delay
Input sampling time
A/D conversion time
ø
Input sampling
timing
ADF
Address bus
Write signal
Legend:
(1):
(2):
t
t
t
D:
SPL:
CONV:
ADCSR write cycle
ADCSR address
A/D conversion start delay
Input sampling time
A/D conversion time
(1)
(2)
Figure 16-5 A/D Conversion Timing
t
D
Symbol
t
t
t
D
SPL
CONV
t
SPL
D
Min
10
—
259
and the input sampling time. The length of t
t
CONV
CKS = 0
Typ
—
63
—
Max
17
—
266
Rev.6.00 Oct.28.2004 page 549 of 1016
Min
6
—
131
CKS = 1
Typ
—
31
—
REJ09B0138-0600H
Max
9
—
134
D
varies
D
after
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