DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 300

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

Port 1 Data Direction Register (P1DDR)
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port 1. P1DDR
cannot be read; if it is, an undefined value will be read.
Setting a P1DDR bit to 1 makes the corresponding port 1 pin an output pin, while clearing the bit to 0 makes the pin an
input pin.
P1DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode. As the PPG, TPU, and DMAC are initialized by a manual reset*, the pin states are
determined by the P1DDR and P1DR specifications.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 1 Data Register (P1DR)
P1DR is an 8-bit readable/writable register that stores output data for the port 1 pins (P1
P1DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 1 Register (PORT1)
Note: * Determined by state of pins P1
PORT1 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port 1
pins (P1
If a port 1 read is performed while P1DDR bits are set to 1, the P1DR values are read. If a port 1 read is performed while
P1DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT1 contents are determined by the pin states, as P1DDR and
P1DR are initialized. PORT1 retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Rev.6.00 Oct.28.2004 page 270 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Bit
Initial value :
R/W
7
to P1
:
:
:
:
:
:
0
) must always be performed on P1DR.
P17DDR P16DDR P15DDR P14DDR P13DDR P12DDR P11DDR P10DDR
P17DR
R/W
P17
—*
W
7
0
7
0
7
R
P16DR
R/W
P16
—*
W
6
0
6
0
6
R
7
P15DR
to P1
R/W
P15
—*
W
5
0
5
0
5
R
0
.
P14DR
R/W
P14
—*
W
4
0
4
0
4
R
P13DR
R/W
P13
—*
W
3
0
3
0
3
R
P12DR
R/W
P12
—*
W
2
0
2
0
2
R
P11DR
R/W
P11
—*
W
1
0
1
0
1
R
7
to P1
P10DR
R/W
P10
—*
W
0
0
0
0
0
R
0
).