DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 339

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port B Register (PORTB) (On-Chip ROM Version Only)
Note: * Determined by state of pins PB
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port B
pins (PB
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B read is performed while
PBDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTB contents are determined by the pin states, as PBDDR and
PBDR are initialized. PORTB retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port B MOS Pull-Up Control Register (PBPCR) (On-Chip ROM Version Only)
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
PBPCR is an 8-bit readable/writable register that controls the MOS input pull-up function incorporated into port B on an
individual bit basis.
When a PBDDR bit is cleared to 0 (input port setting) in mode 6 or 7, setting the corresponding PBPCR bit to 1 turns on
the MOS input pull-up for the corresponding pin.
PBPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
7
to PB
:
:
:
:
0
) must always be performed on PBDR.
PB7PCR PB6PCR PB5PCR PB4PCR PB3PCR PB2PCR PB1PCR PB0PCR
PB7
R/W
—*
7
R
7
0
PB6
R/W
—*
6
R
6
0
7
to PB
PB5
R/W
—*
5
R
5
0
0
.
PB4
R/W
—*
4
R
4
0
PB3
R/W
—*
3
R
3
0
PB2
R/W
—*
2
R
2
0
PB1
R/W
—*
Rev.6.00 Oct.28.2004 page 309 of 1016
1
R
1
0
PB0
R/W
—*
0
R
0
0
REJ09B0138-0600H