DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 540

IC H8S MCU FLASH 256K 120TQFP

DF2398TE20

Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
In serial reception, the SCI operates as described below.
[1] The SCI performs internal initialization in synchronization with serial clock input or output.
[2] The received data is stored in RSR in LSB-to-MSB order.
[3] If the RIE bit in SCR is set to 1 when the RDRF flag changes to 1, a receive data full interrupt (RXI) request is
Figure 14-19 shows an example of SCI operation in reception.
Rev.6.00 Oct.28.2004 page 510 of 1016
REJ09B0138-0600H
After reception, the SCI checks whether the RDRF flag is 0 and the receive data can be transferred from RSR to RDR.
If this check is passed, the RDRF flag is set to 1, and the receive data is stored in RDR. If a receive error is detected in
the error check, the operation is as shown in table 14-11.
Neither transmit nor receive operations can be performed subsequently when a receive error has been found in the
error check.
generated.
Also, if the RIE bit in SCR is set to 1 when the ORER flag changes to 1, a receive error interrupt (ERI) request is
generated.
Serial
clock
Serial
data
RDRF
ORER
RXI interrupt request
generated
Figure 14-19 Example of SCI Operation in Reception
Bit 7
RDR data read and
RDRF flag cleared to 0
in RXI interrupt service
routine
Bit 0
1 frame
Bit 7
Bit 0
RXI interrupt request
generated
Bit 1
ERI interrupt request
generated by overrun
error
Bit 6
Bit 7

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