DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 128

IC H8S MCU FLASH 256K 120TQFP

DF2398TE20

Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.4.5
The H8S/2357 Group is capable of fast word transfer instruction to on-chip memory, and the program area is provided in
on-chip ROM and the stack area in on-chip RAM, enabling high-speed processing.
Table 5-9 shows interrupt response times - the interval between generation of an interrupt request and execution of the
first instruction in the interrupt handling routine. The execution status symbols used in table 5-9 are explained in table 5-
10.
Table 5-9
Notes: 1. Two states in case of internal interrupt.
Table 5-10 Number of States in Interrupt Handling Routine Execution Statuses
Legend:
m: Number of wait states in an external device access.
Rev.6.00 Oct.28.2004 page 98 of 1016
REJ09B0138-0600H
2. Refers to MULXS and DIVXS instructions.
3. Prefetch after interrupt acceptance and interrupt handling routine prefetch.
4. Internal processing after interrupt acceptance and internal processing after vector fetch.
Interrupt Response Times
No.
1
2
3
4
5
6
Total (using on-chip memory)
Symbol
Instruction fetch
Branch address read
Stack manipulation
Interrupt Response Times
Execution Status
Interrupt priority determination*
Number of wait states until executing
instruction ends*
PC, CCR, EXR stack save
Vector fetch
Instruction fetch*
Internal processing*
2
3
4
S
S
S
I
J
K
Internal
Memory
1
1
8-Bit Bus
2-State
Access
4
INTM1 = 0
3
1 to (19+2·S
2·S
2·S
2·S
2
12 to 32
K
I
I
Object of Access
3-State
Access
6 + 2m
I
)
External Device
Advanced Mode
2-State
Access
2
16-Bit Bus
INTM1 = 1
3
1 to (19+2·S
3·S
2·S
2·S
2
13 to 33
K
I
I
3-State
Access
3 + m
I
)

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