DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 148

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

6.2.7
DRAMCR is an 8-bit readable/writable register that selects the DRAM refresh mode and refresh counter clock, and
controls the refresh timer.
DRAMCR is initialized to H'00 by a power-on reset and in hardware standby mode. It is not initialized by a manual reset*
or in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Bit 7—Refresh Control (RFSHE): Selects whether or not refresh control is performed. When refresh control is not
performed, the refresh timer can be used as an interval timer.
Bit 6—RAS-CAS Wait (RCW): Controls wait state insertion in DRAM interface CAS-before-RAS refreshing.
Bit 5—Refresh Mode (RMODE): When refresh control is performed (RFSHE = 1), this bit selects whether normal
refreshing (CAS-before-RAS refreshing for the DRAM interface) or self-refreshing is performed.
Bit 4—Compare Match Flag (CMF): Status flag that indicates a match between the values of RTCNT and RTCOR.
When refresh control is performed (RFSHE = 1), 1 should be written to the CMF bit when writing to DRAMCR.
Rev.6.00 Oct.28.2004 page 118 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
DRAM Control Register (DRAMCR)
Bit 7
RFSHE
0
1
Bit 6
RCW
0
1
Bit 5
RMODE
0
1
Bit 4
CMF
0
1
:
:
RFSHE
R/W
7
0
Description
Refresh control is not performed
Refresh control is performed
Description
Wait state insertion in CAS-before-RAS refreshing disabled
RAS falls in T
One wait state inserted in CAS-before-RAS refreshing
RAS falls in T
Description
DRAM interface
CAS-before-RAS refreshing used
Self-refreshing used
Description
[Clearing condition]
Cleared by reading the CMF flag when CMF = 1, then writing 0 to the CMF flag
[Setting condition]
Set when RTCNT = RTCOR
RCW
R/W
6
0
RMODE
Rr
Rc1
R/W
cycle
cycle
5
0
CMF
R/W
4
0
CMIE
R/W
3
0
CKS2
R/W
2
0
CKS1
R/W
1
0
CKS0
R/W
0
0
(Initial value)
(Initial value)
(Initial value)
(Initial value)