DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 58

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

The R registers divide into 8-bit general registers designated by the letters RH (R0H to R7H) and RL (R0L to R7L). These
registers are functionally equivalent, providing a maximum sixteen 8-bit registers.
Figure 2-5 illustrates the usage of the general registers. The usage of each register can be selected independently.
General register ER7 has the function of stack pointer (SP) in addition to its general-register function, and is used
implicitly in exception handling and subroutine calls. Figure 2-6 shows the stack.
2.4.3
The control registers are the 24-bit program counter (PC), 8-bit extended control register (EXR), and 8-bit condition-code
register (CCR).
(1) Program Counter (PC): This 24-bit counter indicates the address of the next instruction the CPU will execute. The
length of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an instruction is
fetched, the least significant PC bit is regarded as 0.)
(2) Extended Control Register (EXR): This 8-bit register contains the trace bit (T) and three interrupt mask bits (I2 to
I0).
Bit 7—Trace Bit (T): Selects trace mode. When this bit is cleared to 0, instructions are executed in sequence. When this
bit is set to 1, a trace exception is generated each time an instruction is executed.
Bits 6 to 3—Reserved: These bits are reserved. They are always read as 1.
Rev.6.00 Oct.28.2004 page 28 of 1016
REJ09B0138-0600H
Control Registers
• Address registers
• 32-bit registers
(ER0 to ER7)
ER registers
SP (ER7)
Figure 2-5 Usage of General Registers
E registers (extended registers)
Figure 2-6 Stack
• 16-bit registers
R registers
(R0 to R7)
(E0 to E7)
Stack area
Free area
• 8-bit registers
(R0H to R7H)
(R0L to R7L)
RH registers
RL registers