DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 445

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

11.2
11.2.1
NDERH and NDERL are 8-bit readable/writable registers that enable or disable pulse output on a bit-by-bit basis.
If a bit is enabled for pulse output by NDERH or NDERL, the NDR value is automatically transferred to the
corresponding PODR bit when the TPU compare match event specified by PCR occurs, updating the output value. If
pulse output is disabled, the bit value is not transferred from NDR to PODR and the output value does not change.
NDERH and NDERL are each initialized to H'00 by a reset and in hardware standby mode. They are not initialized in
software standby mode.
NDERH Bits 7 to 0—Next Data Enable 15 to 8 (NDER15 to NDER8): These bits enable or disable pulse output on a
bit-by-bit basis.
NDERL Bits 7 to 0—Next Data Enable 7 to 0 (NDER7 to NDER0): These bits enable or disable pulse output on a bit-
by-bit basis.
NDERH
Bit
Initial value :
R/W
NDERL
Bit
Initial value :
R/W
Register Descriptions
Next Data Enable Registers H and L (NDERH, NDERL)
Bits 7 to 0
NDER15 to NDER8
0
1
Bits 7 to 0
NDER7 to NDER0
0
1
:
:
:
:
NDER15 NDER14 NDER13 NDER12 NDER11 NDER10 NDER9
NDER7
R/W
R/W
7
0
7
0
NDER6
R/W
R/W
6
0
6
0
Description
Pulse outputs PO15 to PO8 are disabled (NDR15 to NDR8 are not
transferred to POD15 to POD8)
Pulse outputs PO15 to PO8 are enabled (NDR15 to NDR8 are transferred
to POD15 to POD8)
Description
Pulse outputs PO7 to PO0 are disabled (NDR7 to NDR0 are not
transferred to POD7 to POD0)
Pulse outputs PO7 to PO0 are enabled (NDR7 to NDR0 are transferred to
POD7 to POD0)
NDER5
R/W
R/W
5
0
5
0
NDER4
R/W
R/W
4
0
4
0
NDER3
R/W
R/W
3
0
3
0
NDER2
R/W
R/W
2
0
2
0
NDER1
R/W
R/W
Rev.6.00 Oct.28.2004 page 415 of 1016
1
0
1
0
NDER8
NDER0
R/W
R/W
0
0
0
0
(Initial value)
(Initial value)
REJ09B0138-0600H