DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 349
![IC H8S MCU FLASH 256K 120TQFP](/photos/28/61/286120/120-tqfp_sml.jpg)
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 349 of 1049
- Download datasheet (5Mb)
Port D Register (PORTD) (On-Chip ROM Version Only)
Note: * Determined by state of pins PD
PORTD is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port
D pins (PD
If a port D read is performed while PDDDR bits are set to 1, the PDDR values are read. If a port D read is performed
while PDDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTD contents are determined by the pin states, as PDDDR and
PDDR are initialized. PORTD retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port D MOS Pull-Up Control Register (PDPCR) (On-Chip ROM Version Only)
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
PDPCR is an 8-bit readable/writable register that controls the MOS input pull-up function incorporated into port D on an
individual bit basis.
When a PDDDR bit is cleared to 0 (input port setting) in mode 7, setting the corresponding PDPCR bit to 1 turns on the
MOS input pull-up for the corresponding pin.
PDPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
7
to PD
:
:
:
:
PD7PCR PD6PCR PD5PCR PD4PCR PD3PCR PD2PCR PD1PCR PD0PCR
0
PD7
) must always be performed on PDDR.
R/W
—*
7
R
7
0
PD6
R/W
—*
6
R
6
0
7
PD5
R/W
to PD
—*
5
R
5
0
0
.
PD4
R/W
—*
4
R
4
0
PD3
R/W
—*
3
R
3
0
PD2
R/W
—*
2
R
2
0
PD1
R/W
—*
Rev.6.00 Oct.28.2004 page 319 of 1016
1
R
1
0
PD0
R/W
—*
0
R
0
0
REJ09B0138-0600H
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