DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 555

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

15.3.3
Figure 15-3 shows the Smart Card interface data format. In reception in this mode, a parity check is carried out on each
frame, and if an error is detected an error signal is sent back to the transmitting end, and retransmission of the data is
requested. If an error signal is sampled during transmission, the same data is retransmitted.
The operation sequence is as follows.
[1] When the data line is not in use it is in the high-impedance state, and is fixed high with a pull-up resistor.
[2] The transmitting station starts transfer of one frame of data. The data frame starts with a start bit (Ds, low-level),
[3] With the Smart Card interface, the data line then returns to the high-impedance state. The data line is pulled high with
[4] The receiving station carries out a parity check.
[5] If the transmitting station does not receive an error signal, it proceeds to transmit the next data frame.
followed by 8 data bits (D0 to D7) and a parity bit (Dp).
a pull-up resistor.
If there is no parity error and the data is received normally, the receiving station waits for reception of the next data.
If a parity error occurs, however, the receiving station outputs an error signal (DE, low-level) to request retransmission
of the data. After outputting the error signal for the prescribed length of time, the receiving station places the signal
line in the high-impedance state again. The signal line is pulled high again by a pull-up resistor.
If it does receive an error signal, however, it returns to step [2] and retransmits the erroneous data.
Data Format
Legend:
When there is no parity error
When a parity error occurs
Ds:
D0 to D7:
Dp:
DE:
Ds
Ds
Start bit
Data bits
Parity bit
Error signal
D0
D0
Figure 15-3 Smart Card Interface Data Format
D1
D1
D2
D2
Transmitting station output
Transmitting station output
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
Rev.6.00 Oct.28.2004 page 525 of 1016
Dp
Dp
Receiving station
output
DE
REJ09B0138-0600H