DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 550

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

15.2
Registers added with the Smart Card interface and bits for which the function changes are described here.
15.2.1
SCMR is an 8-bit readable/writable register that selects the Smart Card interface function.
SCMR is initialized to H'F2 by a reset, and in standby mode or module stop mode.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion format.
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This function is used together with
the SDIR bit for communication with an inverse convention card. The SINV bit does not affect the logic level of the parity
bit. For parity-related setting procedures, see section 15.3.4, Register Settings.
Bit 1—Reserved: This bit cannot be modified and is always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the Smart Card interface function.
Rev.6.00 Oct.28.2004 page 520 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Register Descriptions
Smart Card Mode Register (SCMR)
Bit 3
SDIR
0
1
Bit 2
SINV
0
1
Bit 0
SMIF
0
1
:
:
—
—
7
1
Description
TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
Description
TDR contents are transmitted as they are
Receive data is stored as it is in RDR
TDR contents are inverted before being transmitted
Receive data is stored in inverted form in RDR
Description
Smart Card interface function is disabled
Smart Card interface function is enabled
—
—
6
1
—
—
5
1
—
—
4
1
SDIR
R/W
3
0
SINV
R/W
2
0
—
—
1
1
SMIF
R/W
0
0
(Initial value)
(Initial value)
(Initial value)