HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1055
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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Bit
5
4
3
2
Bit Name
TE
RE
WAIT_IE
TEIE
0
0
Initial
Value
0
0
R/W
R/W
R/W
R/W
R/W
Receive Enable
Wait Enable
Transmit End Interrupt Enable
Description
Transmit Enable
Enables/disables serial transmit operations.
0: Disables transmission*
1: Enables transmission*
Notes: 1. The TDRE flag in SCSSR is fixed to 1.
Enables/disables serial receive operations.
0: Disables reception*
1: Enables reception*
Notes: 1. Clearing the RE bit to 0 has no effect on the
Enables/disables wait error interrupt requests.
0: Disables wait error interrupt (ERI) requests
1: Enables wait error interrupt (ERI) requests
When transmission ends and the TEND flag is set to 1,
transmit end interrupt (TEI) requests are enabled/disabled.
0: Disables transmit end interrupt (TEI) requests*
1: Enables transmit end interrupt (TEI) requests*
Note: * A TEI can be canceled either by writing transmit
2. In this state, if transmit data is written to SCTDR,
3. Even if the TE bit is cleared to 0, the ERS flag is
2. If the start bit is detected in this state, serial
data to SCTDR and clearing the TEND bit, or by
clearing the TEIE bit to 0 after the TDRE flag in
SCSSR is read as 1.
the transmit operation is initiated. Before setting
the TE bit to 1, the serial mode register
(SCSMR) and smart card mode register
(SCSCMR) must always be set, to determine the
transmit format.
unaffected, and the previous state is retained.
RDRF, PER, ERS, ORER, or WAIT_ER flag,
and the previous state is retained.
reception is initiated. Before setting the RE bit to
1, SCSMR and SCSCMR must always be set, to
determine the receive format.
Rev. 3.00 Jan. 18, 2008 Page 993 of 1458
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1
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Section 30
3
SIM Card Module (SIM)
REJ09B0033-0300
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