HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 891

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

25.3.35 Time Stamp Register (TSRH/TSRL)
TSR is a register to store the current time stamp value. The time stamp is updated when the SOF
bit in IFR0 is set to 1. The value of the time stamp when the SOF mark function is enabled and the
SOF packet is broken remains as previous one.
Note: The time stamp register is used as a 16-bit register which consists of upper byte TSRH and
Bit
2
1
0
Bit
15 to 11 
10
9
8
7
6
5
4
3
2
1
0
Bit Name
ALTV2
ALTV1
ALTV0
lower TSRL in USBF. TSRH can be read directly, but TSRL is read via an 8-bit temporary
register. Therefore, the registers should be accessed in the order, TSRH and TSRL, in byte
units. TSRL cannot be read singly.
Bit Name Initial Value R/W
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
All 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Initial Value R/W Description
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Description
Reserved.
This bit is always read as 0.
Time Stamp Data
Alternate Value
The alternate setting value is stored when the Set
interface command has been received.
ALTV is updated when the SETI bit in the interrupt
flag register is set to 1.
Section 25
Rev. 3.00 Jan. 18, 2008 Page 829 of 1458
USB Function Controller (USBF)
REJ09B0033-0300