HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 719

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

20.3.6
SAR selects the communication format and sets the slave address. When the chip is in slave mode
with the I
received after a start condition, the chip operates as the slave device.
Bit
1
0
Bit
7 to 1
0
Bit Name
AAS
ADZ
Bit Name
SVA6 to
SVA0

2
Slave Address Register (SAR)
C bus format, if the upper 7 bits of SAR match the upper 7 bits of the first frame
Initial
Value
0
0
Initial
Value
All 0
0
R/W
R/W
R/W
R/W
R/W
R
Description
Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first frame
following a start condition matches bits SVA6 to SVA0 in
SAR.
[Setting conditions]
•
•
[Clearing condition]
•
General Call Address Recognition Flag
This bit is valid in I
[Setting condition]
•
[Clearing conditions]
•
Description
Slave Address 6 to 0
These bits set a unique address in bits SVA6 to SVA0,
differing form the addresses of other slave devices
connected to the I
Reserved
These bits are always read as 0. The write value should
always be 0.
When the slave address is detected in slave receive
mode
When the general call address is detected in slave
receive mode.
When 0 is written in AAS after reading AAS = 1
When the general call address is detected in slave
receive mode
When 0 is written in ADZ after reading ADZ = 1
2
2
Rev. 3.00 Jan. 18, 2008 Page 657 of 1458
C bus.
C bus format slave receive mode.
Section 20
I
2
C Bus Interface (IIC)
REJ09B0033-0300