HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 873

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
25.3.3
IFR2 is an interrupt flag register for SURSS, SURSF, CFDN, SOF, SETC, and SETI. When each
flag is set to 1 and an interrupt is enabled in the corresponding bit of IER2, an interrupt occurs as
specified by the corresponding bit in ISR2. Clearing is performed by writing 0 to the bit to be
cleared. Writing 1 is not valid and nothing is changed.
Bit
1
0
Bit
7, 6
5
Bit Name
EP3 TS
VBUSF
Bit Name
SURSS
Interrupt Flag Register 2 (IFR2)
Initial Value
0
0
Initial Value
All 0
0
R/W Description
R/W EP3 (Interrupt) Transmit Complete
R/W USB Disconnection Detection
R/W Description
R
R
[Setting condition]
When data to be transmitted to the host is written to
EP3, then data is normally transferred from the host to
the function, and an ACK handshake is returned.
[Clearing conditions]
The USBF_VBUS pin of this module is used for
detecting connection/disconnection.
[Setting condition]
When the function is connected to the USB bus or
disconnected from it.
[Clearing conditions]
Reserved
These bits are always read as 0. The write value
should always be 0.
Suspend/Resume Status
Status bit indicating the state of the bus
0: Normal state
1: Suspend state
When reset
When 0 is written to by CPU
When reset
When 0 is written to by CPU.
Section 25
Rev. 3.00 Jan. 18, 2008 Page 811 of 1458
USB Function Controller (USBF)
REJ09B0033-0300

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