HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 499
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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(b) Single Address Mode
In single address mode, either the transfer source or transfer destination peripheral device is
accessed (selected) by means of the DACK signal, and the other device is accessed by an address.
In this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one of the
external devices by outputting the DACK transfer request acknowledge signal to it, and at the
same time outputting an address to the other device involved in the transfer. For example, in the
case of transfer between external memory and an external device with DACK shown in figure
10.7, when the external device outputs data to the data bus, that data is written to the external
memory in the same bus cycle.
Two kinds of transfer are possible in single address mode: (1) transfer between an external device
with DACK and a memory-mapped external device, and (2) transfer between an external device
with DACK and external memory. In both cases, only the external request signal (DREQ) is used
for transfer requests.
This LSI
Figure 10.7
Data flow
DMAC
External address bus
Data Flow in Single Address Mode
DACK
DREQ
Section 10
External data bus
Rev. 3.00 Jan. 18, 2008 Page 437 of 1458
Direct Memory Access Controller (DMAC)
External device
with DACK
External
memory
REJ09B0033-0300
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