HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 288

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 Exception Handling
Notes: 1. Priorities are indicated from high to low, 1 being the highest and 3 the lowest.
Rev. 3.00 Jan. 18, 2008 Page 226 of 1458
REJ09B0033-0300
Exception
Type
General
exception
events
(asynchro-
nous)
General
interrupt
requests
(asynchro-
nous)
2. For details on priorities in multiple interrupt sources, refer to section 8, Interrupt
3. If an interrupt is accepted, the exception event register (EXPEVT) is not changed. The
4. If one of these exceptions occurs in a specific part of the repeat loop, a specific code
5. These exception codes are valid when the MMU is used.
Current
Instruction
Completed
Completed
A reset has the highest priority. An interrupt is accepted only when general exceptions
are not requested.
Controller (INTC).
interrupt source code is specified in the interrupt event registers (INTEVT and
INTEVT2). For details, refer to section 8, Interrupt Controller (INTC).
and vector offset are specified.
Exception Event
User breakpoint
(Data break, I-BUS
break)
DMA address error
Interrupt requests
Priority*
2
2
3
1
Exception
Order
5
6
—*
2
Process
at BL=1
Ignored
Retained H'5C0
Retained —*
Vector
Code
H'1E0
3
Vector
Offset
H'00000100
H'00000100
H'00000600