HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 959

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

26.4
26.4.1
This LCDC is capable of controlling displays with up to 1024 × 1024 dots and 16 bpp (bits per
pixel). The image data for display is stored in VRAM, which is shared with the CPU. This LCDC
should read the data from VRAM before display.
This LSI has a maximum 32-burst memory read operation and a 2.4-kbyte line buffer, so although
a complete breakdown of the display is unlikely, there may be some problems with the display
depending on the combination. A recommended size at the frame rate of 60 Hz is 320 × 240 dots
in 16 bpp or 640 × 480 dots in 8 bpp.
As a rough standard, the bus occupation ratio shown below should not exceed 40%.
The overhead coefficient becomes 1.375 when the CL2 SDRAM is connected to a 32-bit data bus
and 1.188 when connected to a 16-bit data bus.
Bus occupation ratio (%) =
Operation
LCD Module Sizes which can be Displayed in this LCDC
Overhead coefficient x Total number of display pixels ((HDCN + 1) x 8 x (VDLN + 1))
x Frame rate (Hz) x Number of colors (bpp)
CKIO (Hz) x Bus width (bit)
Rev. 3.00 Jan. 18, 2008 Page 897 of 1458
Section 26
LCD Controller (LCDC)
REJ09B0033-0300
x 100