HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 751

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

21.3.3
SITDR is a 32-bit write-only register that specifies the SIOF transmit data.
SITDR is initialized by the conditions specified in section 37, List of Registers, or by a transmit
reset caused by the TXRST bit in SICTR.
SITDR is initialized in module stop mode.
Bit
31 to 16
15 to 0
Transmit Data Register (SITDR)
Bit Name
SITDL
15 to 0
SITDR
15 to 0
Initial
Value
All 0
All 0
R/W
W
W
Description
Left-Channel Transmit Data
Specify data to be output from the SIOFTxD pin as left-
channel data. The position of the left-channel data in
the transmit frame is specified by the TDLA bit in
SITDAR.
•
Right-Channel Transmit Data
Specify data to be output from the SIOFTxD pin as
right-channel data. The position of the right-channel
data in the transmit frame is specified by the TDRA bit
in SITDAR.
•
These bits are valid only when the TDLE bit in
SITDAR is set to 1.
These bits are valid only when the TDRE bit and
TLREP bit in SITDAR are set to 1 and cleared to 0,
respectively.
Rev. 3.00 Jan. 18, 2008 Page 689 of 1458
Section 21
Serial I/O with FIFO (SIOF)
REJ09B0033-0300