HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 524

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 11
Rev. 3.00 Jan. 18, 2008 Page 462 of 1458
REJ09B0033-0300
Bit
12
11, 10 
9
8
7, 6
5
4
3
Bit Name
CKOEN
STC1
STC0

IFC1
IFC0

Clock Pulse Generator (CPG)
Initial
Value
1
All 0
0
0
All 0
0
0
0
R/W
R/W
R
R/W
R/W
R
R/W
R/W
R
Description
Clock Output Enable
CKOEN specifies whether a clock is output from the
CKIO pin or the CKIO pin is placed in the level-fixed
state in the standby mode, CKIO pin is fixed at low
during STATUS 1 = L, and STATUS0 = H, when CKOEN
is set to 0. Therefore, the malfunction of an external
circuit because of an unstable CKIO clock in releasing
the standby mode can be prevented. The CKIO pin
becomes to input pin regardless of the value of the
CKOEN bit in clock operating mode 7.
0: CKIO pin goes to low level state in standby mode
1: Clock is output from CKIO pin
Reserved
These bits are always read as 0. The write value should
always be 0.
Frequency Multiplication Ratio of PLL Circuit 1
00: × 1 time
01: × 2 times
10: × 3 times
11: × 4 times
Reserved
These bits are always read as 0. The write value should
always be 0.
Internal Clock Frequency Division Ratio
These bits specify the frequency division ratio of the
internal clock (Iφ) with respect to the output frequency of
PLL circuit 1.
00: × 1 time
01: × 1/2 time
10: × 1/3 time
11: × 1/4 time
Reserved
This bit is always read as 0. The write value should
always be 0.