HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 739
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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20.7
A stop condition or retransmit start condition should be issued after the falling edge of the ninth
clock is recognized. The falling edge of the ninth clock is recognized by checking the SCLO bit in
the I
A stop condition or retransmit start condition may not be output normally if issuance of a stop or
retransmit start condition is attempted with a certain timing under either of the following cases.
There is no problem in uses under conditions other than the blow.
1. When the rising speed of SCL is lowered due to the load of the SCL line (load capacitance or
2. When the bit synchronous circuit works because the low-level period between the eighth and
pull-up resistance) exceeding the time defined in section 20.6, Bit Synchronous Circuit.
ninth clock pulses is extended by the slave device.
2
C bus control register 2 (ICCR2).
Usage Notes
Rev. 3.00 Jan. 18, 2008 Page 677 of 1458
Section 20
I
2
C Bus Interface (IIC)
REJ09B0033-0300
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