HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 150

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 3 DSP Operating Unit
Before entering the exception handling state, all bits including the DSP extension bits of the SR
registers are saved in the SSR. Before returning from the exception handling, all bits including the
DSP extension bits of the SR must be restored. If the repeat control must be recovered before
entering the exception handling state, the RS and RE registers must be recovered to the value that
existed before exception handling. In addition, if it is necessary to recover modulo control before
entering the exception handling state, the MOD register must be recovered to the value that
existed before exception handling.
3.2.4
The DSP unit incorporates eight data registers (A0, A1, X0, X1, Y0, Y1, M0, and M1) and a status
register (DSR). Figure 3.3 shows the DSP register configuration. These are 32-bit width registers
with the exception of registers A0 and A1. Registers A0 and A1 include 8 guard bits (fields A0G
and A1G), giving them a total width of 40 bits. The DSR register stores the DSP data operation
result (zero, negative, others). The DSP register has a DC bit whose function is similar to the T bit
in the CPU register. For details on DSR bits, refer to section 3.5, DSP Data Operation Instructions.
Rev. 3.00 Jan. 18, 2008 Page 88 of 1458
REJ09B0033-0300
DSP Registers
31
39
A0G
A1G
32 31
Figure 3.3 DSP Register Configuration
(a) DSP data registers
................
A0
A1
M0
M1
X0
X1
Y0
Y1
(b) DSP status register (DSR)
0
8
GT
7
Z
6
Initial value
DSR : All 0
Others: Undefined
N
5
4
V
3
CS[2:0]
1
DC
0