HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 66

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 1
Rev. 3.00
REJ09B0033-0300
Item
Direct memory
access controller
(DMAC)
Clock pulse
generator (CPG)
Watchdog timer
(WDT)
Timer unit (TMU) •
Jan. 18, 2008
Overview
Features
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Number of channels: Six channels (two channels support external requests)
Address space: 4 Gbytes on architecture
Data transfer length: Bytes, words (2 bytes), longwords (4 bytes), 16 bytes
(longword × 4)
Maximum number of transfer times: 16,777,216 times
Address mode: Single address mode or dual address mode selectable
Transfer request: Selectable from external request, on-chip peripheral
module request, and auto request
Bus mode: Selectable from cycle steal mode (normal mode and intermittent
mode) and burst mode
Priority: Selectable from channel priority fixed mode and round robin mode
Interrupt request: Supports interrupt request to CPU at the end of data
transfer
External request detection: Selectable from DREQ input low/high level
detection and rising/falling detection
Transfer request acceptance signal: DACK and TEND can be set an active
level
Clock mode: Input clock selectable from external clock (EXTAL or CKIO)
and crystal resonator
Generates three types of clocks
 CPU clock: Maximum 133.34 MHz
 Bus clock: Maximum 66.67 MHz
 Peripheral clock: Maximum 33.34 MHz
Supports power-down mode
 Sleep mode
 Standby mode
 Module standby mode (X/Y memory standby enabled)
One-channel watchdog timer
One-channel watchdog timer (WDT)
Interrupt request: WDT only
Internal three-channel 32-bit timer
Auto-reload type 32-bit down counter
Internal prescaler for Pφ
Interrupt request
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