HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 588
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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Section 15
Note:
15.3.6
The TCNT registers are 16-bit readable/writable counters. The TPU has four TCNT counters, one
for each channel.
The TCNT counters are initialized to H'0000 by a reset.
The TCNT counters are not initialized in standby mode, sleep mode, or module standby.
15.3.7
The TGR registers are 16-bit registers. The TPU has 16 TGR registers, four each for channels 0
and 3. TGRC and TGRD can also be designated for operation as buffer registers*. The TGR
registers are initialized to H'FFFF by a reset. These registers are not initialized in standby mode,
sleep mode, or module standby.
Note: * TGR buffer register combinations are TGRA—TGRC and TGRB—TGRD.
Rev. 3.00 Jan. 18, 2008 Page 526 of 1458
REJ09B0033-0300
Bit
1
0
*
Bit Name
TGFB
TGFA
Timer Counters (TCNT)
Timer General Registers (TGR)
Only 0 can be written, to clear the flag.
16-Bit Timer Pulse Unit (TPU)
Initial
Value R/W
0
0
R/(W)* Compare Flag B
R/(W)* Output Compare Flag A
Description
Status flag that indicates the occurrence of TGRB compare
match.
[Clearing conditions]
When 0 is written to TGFB after reading TGFB = 1
[Setting conditions]
When TCNT = TGRB
Status flag that indicates the occurrence of TGRA compare
match.
[Clearing conditions]
When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
When TCNT = TGRA
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