HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1098
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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Section 31
31.3.4
TBCR is an 8-bit readable/writable register that specifies the number of bytes to be transferred
(block size) for each single block transfer command. TBCR specifies the number of data block
bytes not including the start and end bytes and CRC.
The multiblock transfer command corresponds to the number of bytes of each data block. This
setting is ignored by the stream transfer command in MMC mode stream.
Rev. 3.00 Jan. 18, 2008 Page 1036 of 1458
REJ09B0033-0300
Bit
7 to 4
3
2
1
0
Bit Name
—
C3
C2
C1
C0
Transfer Byte Number Count Register (TBCR)
MultiMediaCard Interface (MMCIF)
Initial
Value
All 0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Transfer data block size
0000: 1 byte
0001: 2 bytes
0010: 4 bytes
0011: 8 bytes
0100: 16 bytes
0101: 32 bytes
0110: 64 bytes
0111: 128 bytes
1000: 256 bytes
1001: 512 bytes
1010: 1024 bytes
1011: 2048 bytes
1100 to 1111: Setting prohibited
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