HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 131

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 2.7
Instruction
ADD
ADD
ADDC
ADDV
CMP/EQ
CMP/EQ
CMP/HS
CMP/GE
CMP/HI
CMP/GT
CMP/PL
CMP/PZ
CMP/STR Rm,Rn
DIV1
DIV0S
DIV0U
DMULS.L Rm,Rn
DMULU.L Rm,Rn
DT
Rm,Rn
#imm,Rn
Rm,Rn
Rm,Rn
#imm,R0
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rn
Rn
Rm,Rn
Rm,Rn
Rn
Arithmetic Operation Instructions
Instruction Code Operation
0011nnnnmmmm1100
0111nnnniiiiiiii
0011nnnnmmmm1110
0011nnnnmmmm1111
10001000iiiiiiii
0011nnnnmmmm0000
0011nnnnmmmm0010
0011nnnnmmmm0011
0011nnnnmmmm0110
0011nnnnmmmm0111
0100nnnn00010101
0100nnnn00010001
0010nnnnmmmm1100
0011nnnnmmmm0100
0010nnnnmmmm0111
0000000000011001
0011nnnnmmmm1101
0011nnnnmmmm0101
0100nnnn00010000
Rn+Rm→Rn
Rn+imm→Rn
Rn+Rm+T→Rn, Carry→T
Rn+Rm→Rn, Overflow→T
If R0 = imm, 1 → T
If Rn = Rm, 1 → T
If Rn ≥ Rm with unsigned data,
1 → T
If Rn ≥ Rm with signed data,
1 → T
If Rn > Rm with unsigned data,
1 → T
If Rn > Rm with signed data,
1 → T
If Rn ≥ 0, 1 → T
If Rn > 0, 1 → T
If Rn and Rm have an
equivalent byte, 1 → T
Single-step division (Rn/Rm)
MSB of Rn → Q,
MSB of Rm → M, M ^ Q → T
0 → M/Q/T
Signed operation of Rn × Rm
→ MACH,
MACL 32 × 32 → 64 bits
Unsigned operation of Rn ×
Rm → MACH,
MACL 32 × 32 → 64 bits
Rn – 1 → Rn,
if Rn = 0, 1 → T, else 0 → T
Rev. 3.00 Jan. 18, 2008 Page 69 of 1458
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REJ09B0033-0300
Section 2
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Comparison
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