HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 902

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 25
• Setup Stage
Rev. 3.00 Jan. 18, 2008 Page 840 of 1458
REJ09B0033-0300
Notes: 1 In the setup stage, the application analyzes command data from the host requiring processing by
Receive 8-byte command
USB Function Controller (USBF)
SETUP token reception
reception complete flag
2 When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
(IFR0/SETUP TS = 1)
Set setup command
to be processed by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
To data stage
data in EP0s
application?
Command
USB function
Yes
Figure 25.6
No
processing by
Interrupt request
this module
Automatic
Setup Stage Operation
Clear EP0o FIFO (FCLR/EP0oCLR = 1)
Clear EP0i FIFO (FCLR/EP0iCLR = 1)
To control-in
Write 1 to EP0s read complete bit
Determine data stage direction
data stage
Read 8-byte data from EP0s
Decode command data
(TRG/EP0s RDFN = 1)
(IFR0/SETUP TS = 0)
Clear SETUP TS flag
Application
*2
To control-out
data stage
*1