HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 656
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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Section 18
Note: In synchronous mode, bits other than CKS1 and CKS0 are fixed 0.
Rev. 3.00 Jan. 18, 2008 Page 594 of 1458
REJ09B0033-0300
Bit
3
2
1
0
Bit Name
STOP
—
CKS1
CKS0
Serial Communication Interface with FIFO (SCIF)
0
0
0
0
Initial Value R/W
R/W
R
R/W
R/W
Description
Stop Bit Length
Selects one or two bits as the stop bit length.
In receiving, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit, but if the second stop
bit is 0, it is treated as the start bit of the next incoming
character.
This setting is only valid in asynchronous mode. In
synchronous mode, this setting is invalid since stop
bits are not added.
0: One stop bit*
1: Two stop bits*
Notes: 1. In transmitting, a single bit of 1 is added at
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Select 1 and 0
These bits select the internal clock source of the on-
chip baud rate generator.
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
2. In transmitting, two bits of 1 are added at
the end of each transmitted character.
the end of each transmitted character.
1
2
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