HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 800
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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Section 22
Table 22.2 FIFO Interrupt Size
Rev. 3.00 Jan. 18, 2008 Page 738 of 1458
REJ09B0033-0300
Bit
1
0
Bit 4:
FFSZ2
0
1
Bit Name
TE
RE
Analog Front End Interface (AFEIF)
Bit 3:
FFSZ1
0
1
0
1
Bit 2:
FFSZ0
0
1
0
1
0
1
0
1
Initial Value
0
0
FIFO Size
128
64
32
16
8
4
2
96
R/W
R/W
R/W
Description
Transmit Enable
0: Transmit operation is disabled. The READ
1: Transmit operation is enabled.
Receive Enable
0: Receive operation is disabled. The READ
1: Receive operation is enabled
TFE/RFF
128 empty/full
64 empty/full
32 empty/full
16 empty/full
8 empty/full
4 empty/full
2 empty/full
96 empty/full
pointer of FIFO is stacked to the first address.
WRITE pointer is reset when 0 is written to this
bit. TFEM and THEM bits in ASTR1 is set to 1
at that time.
/WRITE pointer is fixed to the first address.
Bits RFFM and RHFM in ASTR1 are set to 1 at
that time.
Description
THE/RHF
64 empty/full
32 empty/full
16 empty/full
8 empty/full
4 empty/full
2 empty/full
1 empty/full
48 empty/full
(Initial value)
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