HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 193
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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3.5.5
Figure 3.14 shows the ALU integer arithmetic operation flow. Table 3.23 shows the variation of
this type of operation. The correspondence between each operand and registers is the same as
ALU fixed-point operations as shown in table 3.22.
Table 3.23 Variation of ALU Integer Operations
Note: The ALU integer operations are basically 24-bit operation, the upper 16 bits of the base
Mnemonic
PINC
PDEC
precision and 8 bits of the guard-bits parts. So the signed bit is copied to the guard-bit parts
when a register not providing the guard-bit parts is specified as the source operand. When
a register not providing the guard-bit parts is specified as a destination operand, the upper
word excluding the guard bits of the operation result are input into the destination register.
ALU Integer Operations
39
Guard
31
Source 1
Function
Increment by 1
Decrement by 1
Figure 3.14 ALU Integer Arithmetic Operation Flow
39
Guard
31
Destination
0
ALU
Source 1
Sx
+1
Sx
–1
39
Guard
31
Source 2
0
Source 2
+1
Sy
–1
Sy
Rev. 3.00 Jan. 18, 2008 Page 131 of 1458
DSR
Ignored
Cleared to 0
0
GT Z
Section 3 DSP Operating Unit
N
Destination
Dz
Dz
Dz
Dz
V DC
REJ09B0033-0300
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