HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1500
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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Rev. 3.00 Jan. 18, 2008 Page 1438 of 1458
REJ09B0033-0300
Item
Section 35 I/O Ports
35.5 Port E
Figure 35.5 Port E
35.5.2 Port E Data Register
(PEDR)
Table 35.5 Port E Data Register
(PEDR) Read/Write Operations
35.6 Port F
Figure 35.6 Port F
35.6.2 Port F Data Register
(PFDR)
1191 Deleted
Page Revision (See Manual for Details)
1187 Changed
1188 Added and changed
1189
1190 Changed
Separate tables have been provided for conditions n =
0 to 4 and n = 5 and 6.
Deleted
PFDR is a register that stores data for pins PTF6 to
PTF0. Bits PF6DT to PF0DT correspond to pins PTF6
to PTF0. When the function is general input port, if the
port is read, the corresponding pin level is read. …
Note: n= 5 or 6
PECR State
PEnMD1
0
1
Port E
PEnMD0
0
1
0
1
Port F
Pin State
Other
function
Reserved
Input (Pull-
up MOS
on)
Input (Pull-
up MOS
off)
PTE6 (input)/AFE_RXIN (input)/IIC_SCL (input/output)
PTE5 (input)/AFE_RDET (input)/IIC_SDA (input/output)
PTE4 (input/output) / LDC_M_DISP (output)
PTE3 (input/output) / LDC_CL1 (output)
PTE2 (input/output) / LDC_CL2 (output)
PTE1 (input/output) / LDC_DON (output)
PTE0 (input/output) / LDC_FLM (output)
PTF6 (input) / DA1 (output)
PTF5 (input) / DA0 (output)
PTF4 (input) / AN3 (input)
PTF3 (input) / AN2 (input)
PTF2 (input) / AN1 (input)
PTF1 (input) / AN0 (input)
PTF0 (input)/ADTRG (input)
Read
PEDR value
Pin state
Pin state
Write
Value is written to PEDR,
but does not affect pin
state.
Value is written to PEDR,
but does not affect pin
state.
Value is written to PEDR,
but does not affect pin
state.
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