HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 122

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2
2.5.3
Table 2.4 shows the instruction formats, and the meaning of the source and destination operands,
for instructions executed by the CPU core. The meaning of the operands depends on the
instruction code. The following symbols are used in the table.
Table 2.4
Rev. 3.00 Jan. 18, 2008 Page 60 of 1458
REJ09B0033-0300
Instruction Format
0 type
15
n type
15
m type
15
xxxx xxxx xxxx xxxx
xxxx nnnn xxxx xxxx
xxxx
mmmm
xxxx xxxx
Instruction Formats
xxxx:
mmmm:
nnnn:
iiii:
dddd:
CPU
CPU Instruction Formats
0
0
0
Instruction code
Source register
Destination register
Immediate data
Displacement
Source Operand


Control register or
system register
Control register or
system register
mmmm: register
direct
mmmm: post-
increment register
indirect
mmmm: register
indirect
PC-relative using
Rm
Destination
Operand

nnnn: register
direct
nnnn: register
direct
nnnn: pre-
decrement register
indirect
Control register or
system register
Control register or
system register


Sample Instruction
NOP
MOVT Rn
STS
STC.L
LDC
LDC.L
JMP
BRAF
MACH,Rn
SR,@-Rn
Rm,SR
@Rm+,SR
@Rm
Rm