HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 747

no-image

HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 21.2 Operation in Each Transfer Mode
Notes: *1 The control data method is valid only when the FL bit is specified as 1xxx. (x: Don't
Bit
4
3 to 0
Transfer Mode
Slave mode 1
Slave mode 2
Master mode 1
Master mode 2
*2 Depending on the timing to start SYNC signal output in master mode 2, the SYNC
Bit Name
SYNCDL
care.)
signal of the head frame in the high period can be extended to I bit. For details, see
section 21.5, Usage Notes.
Master/Slave
Slave
Slave
Master
Master
Initial
Value
0
All 0
R/W
R/W
R
SIOFSYNC
Synchronous
pulse
Synchronous
pulse
Synchronous
pulse
L/R
Description
Data Pin Bit Delay for SIOFSYNC Pin
Valid when the SIOFSYNC signal is output as
synchronous pulse. Only one-bit delay is valid for
transmission in slave mode.
0: No bit delay
1: 1-bit delay
Reserved
These bits are always read as 0. The write value should
always be 0.
Bit Delay
SYNCDL bit
No*
Rev. 3.00 Jan. 18, 2008 Page 685 of 1458
2
Section 21
Control Data Method*
Slot position
Secondary FS
Slot position
Not supported
Serial I/O with FIFO (SIOF)
REJ09B0033-0300
1

Related parts for HD6417320