HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1088

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 30
(6)
In continuous transmission, when the TEIE bit is always set to 1, the TEND bit is set to 1 at a
transmit end. Therefore, the unnecessary transmit end interrupt (TEI) request occurs.
When SCTSR starts transmitting after the last transmit data is written to SCTDR, the TEIE bit in
SCSCR should be set to 1 so that the occurrence of the unnecessary TEI interrupt request can be
prevented.
The waveform of the timing to set the TEIE bit to 1 is shown in figure 30.12.
TEI request
Rev. 3.00 Jan. 18, 2008 Page 1026 of 1458
REJ09B0033-0300
TDRE
TEND
TEIE
Transmit End Interrupt
(DE)
SIM Card Module (SIM)
Ds
D0 D1 D2 D3 D4 D5 D6 D7 DP
Transmit frame
Unnecessary TEND set timing
Figure 30.12
(DE)
Ds
D0 D1 D2 D3 D4 D5 D6 D7 DP
TEIE Set Timing
Transmit frame
(DE)
TEIE set timing
Ds
D0 D1 D2 D3 D4 D5 D6 D7 DP
Last frame

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