HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 664

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18
Rev. 3.00 Jan. 18, 2008 Page 602 of 1458
REJ09B0033-0300
Bit
6
5
Bit Name
TEND
TDFE
Serial Communication Interface with FIFO (SCIF)
Initial Value
1
1
R/W
R
R/(W)*
Description
Transmit End
Indicates that when the last bit of a serial character was
transmitted, the SCFTDR did not contain valid data, so
transmission has ended.
0: Transmission is in progress
[Clearing condition]
Data is written to SCFTDR.
1: End of transmission
[Setting condition]
SCFTDR contains no transmit data when the last bit of a one-
byte serial character is transmitted.
Transmit FIFO Data Empty
Indicates that data is transferred from the transmit FIFO data
register (SCFTDR) to the transmit shift register (SCTSR), the
number of data in SCFTDR becomes less than the number of
transmission triggers specified by the TTRG1 and TTRG0 bits
in the FIFO control register (SCFCR), and writing the transmit
data to SCFTDR is enabled.
0: The number of transmit data written to SCFTDR is greater
[Clearing condition]
1: The number of transmission data in SCFTDR becomes less
[Setting conditions]
•
•
Note:
Data exceeding the specified number of transmission
triggers is written to SCFTDR, software reads TDFE after it
has been set to 1, then writes 0 to TDFE.
than the specified number of transmission triggers
than the specified number of transmission triggers
Power-on reset, manual reset
The number of transmission data in SCFTDR becomes
less than the specified number of transmission triggers as
a result of transmission*
*
Since SCFTDR is a 64-byte FIFO register, the
maximum number of data which can be written
when TDFE is 1 is "64 minus the specified
number of transmission triggers". If attempted to
write additional data, the data is ignored. The
number of data in SCFTDR is indicated by
SCFDR.