HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1124

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 31
(4)
The broadcast, relative address, and flash memory operation commands include a number of
commands that do not include data transfer. Such commands execute the desired data transfer
using command arguments and command responses. For a command that is related to time-
consuming processing such as flash memory write/erase, the MMC indicates the data busy state
via the MMC_DAT.
Figures 31.4 and 31.5 show examples of the command sequence for commands without data
transfer.
Figure 31.6 shows the operational flow for commands without data transfer.
• Settings needed to issue a command are made.
• The START bit in CMDSTRT is set to start command transmission.
• Command transmission complete can be confirmed by the command output end interrupt
• A command response is received from the MMC.
• If the MMC does not return the command response, the command response is detected by the
• The end of a command sequence is detected by poling the BUSY flag in CSTR or by the
• Whether the data busy state is entered or not is determined by the DTBUSY bit in CSTR. If the
• When the CRC error (CRCERI) or command timeout error (CTERI) occurs, write 1 to the
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REJ09B0033-0300
(CMDI).
command timeout error (CTERI).
command response end interrupt (CRPI).
data busy state is entered, the end of the data busy state is detected by the data busy end
interrupt (DBSYI).
CMDOFF bit.
Operation of Commands without Data Transfer
MultiMediaCard Interface (MMCIF)