HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 297

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 7.2
Notes: 1. A specific address is specified in the SPC if an exception occurs while SR.RC[11:0] ≥ 2.
• Example 1: Repeat loop consisting of four or greater instructions
Instruction
Position
[A]
[B]
[C1]
[C2]
RptStart: instr1
RptDtct:
RptEnd:
2. There are a greater number of instructions that can be illegal instructions while
3. An interrupt, break or DMA address error request is retained while SR.RC[11:0] ≥1.
4. A specific exception code is specified while SR.RC[11:0] ≥1.
SR.RC[11:0] ≥ 1.
Instruction Positions and Restriction Types
LDRS RptStart
LDRE RptDtct + 4
SETRC #4
instr0
………
………
RptDtct
RptDtct1
RptDtct2
RptDtct3
instrNext
SPC*
Illegal
1
; [A]
; [A]
; [A]
; [A][Repeat start instruction]
; [A]
; [A]
; [B] A repeat detection
; [C1]
; [C2]
; [C2][Repeat end instruction]
; [A]
Added
Added
Illegal
Instruction*
instruction is an
instruction three
instructions before a
repeat end instruction
; [A]
2
Interrupt,
Break*
Retained
Retained
Retained
Rev. 3.00 Jan. 18, 2008 Page 235 of 1458
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Section 7 Exception Handling
CPU Address
Error*
Instruction/data
Instruction/data
REJ09B0033-0300
4